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    Real talk on traversal: most of the win in hardware RT comes from the traversal strategy, not the BVH build quality itself. If you’re targeting dedicated RT hardware (RTX/Tensor cores, RDNA ray accelerators), you want to lean into stackless traversal with ray segment splitting rather than maintaining a full traversal stack. The classic iterative top-down approach bails on hardware because the stack depth is variable and blows up register pressure. Instead, split the ray into sub-segments at each node boundary and recompute the entry/exit t-values iteratively—this is what the silicon does, and it keeps the work bounded to a fixed register footprint. Pair that with SIMD grouping of coherent rays: co-located screen-space rays share traversal prefixes for dozens of nodes, so you can do warp/wavefront-wide divergence and skip the per-ray branch entirely until coherence breaks down

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