High Precision Event Timer (HPET) vs TSC (Time Stamp Counter) Synchronization: Competitive Benchmark Analysis and العتاد Interactions

[Hunter Miller]

I’ve been running controlled frametime tests on my rig (i9-13900K, RTX 4090) comparing HPET on vs. off, and I’m getting inconsistent results between runs that really shouldn’t vary. My main worry is QueryPerformanceCounter overhead eating into low-percentile frametimes—when HPET’s enabled, QPC calls seem to jump through the timer, and I’m catching tiny micro-stutters in CS2 and Valorant even though my 1% lows look fine on paper

"i7-14700K Lite Load Mode 4 (-0.080V Offset) | 253W Intel Baseline Profile"

[Jayden Cox]

Here’s the deal from actual bench testing: modern CPUs with invariant TSC will absolutely destroy HPET for gaming, and it’s not even close. The TSC is a per-core 64-bit register that ticks at a constant rate (Intel calls this “Invariant TSC,” AMD does the same on Zen), and reading it is a single RDTSC instruction that costs basically nothing—just a few cycles of latency. HPET, on the other hand, lives on the chipset and requires memory-mapped I/O reads at a much lower frequency (usually 8–25 MHz vs. your CPU’s multi-GHz clock). That low resolution plus the MMIO round-trip creates measurable scheduling jitter. On the competitive titles I benchmark (VALORANT, CS2, Apex), flipping HPET off and letting the OS use the invariant TSC consistently shaved 3–8 ms off 1% lows and tightened frame

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